Lines Matching refs:RTE_ETH_DEV_SRIOV
1330 RTE_ETH_DEV_SRIOV(dev).active = RTE_ETH_64_POOLS; in txgbe_check_vf_rss_rxq_num()
1333 RTE_ETH_DEV_SRIOV(dev).active = RTE_ETH_32_POOLS; in txgbe_check_vf_rss_rxq_num()
1339 RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = in txgbe_check_vf_rss_rxq_num()
1340 TXGBE_MAX_RX_QUEUE_NUM / RTE_ETH_DEV_SRIOV(dev).active; in txgbe_check_vf_rss_rxq_num()
1341 RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx = in txgbe_check_vf_rss_rxq_num()
1342 pci_dev->max_vfs * RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool; in txgbe_check_vf_rss_rxq_num()
1353 if (RTE_ETH_DEV_SRIOV(dev).active != 0) { in txgbe_check_mq_mode()
1368 if (nb_rx_q <= RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool) in txgbe_check_mq_mode()
1403 if ((nb_rx_q > RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool) || in txgbe_check_mq_mode()
1404 (nb_tx_q > RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool)) { in txgbe_check_mq_mode()
1409 RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool); in txgbe_check_mq_mode()
1562 nb_q_per_pool = RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool; in txgbe_set_vf_rate_limit()
1563 queue_stride = TXGBE_MAX_RX_QUEUE_NUM / RTE_ETH_DEV_SRIOV(dev).active; in txgbe_set_vf_rate_limit()
1662 !RTE_ETH_DEV_SRIOV(dev).active) && in txgbe_dev_start()
4640 if (RTE_ETH_DEV_SRIOV(dev).active > 0) { in txgbe_dev_get_dcb_info()