310 				   struct rte_eth_dcb_info *dcb_info);
7233 			struct rte_eth_dcb_info *dcb_info)  in ixgbe_dev_get_dcb_info()  argument
7243 		dcb_info->nb_tcs = dcb_config->num_tcs.pg_tcs;  in ixgbe_dev_get_dcb_info()
7245 		dcb_info->nb_tcs = 1;  in ixgbe_dev_get_dcb_info()
7247 	tc_queue = &dcb_info->tc_queue;  in ixgbe_dev_get_dcb_info()
7248 	nb_tcs = dcb_info->nb_tcs;  in ixgbe_dev_get_dcb_info()
7254 			dcb_info->prio_tc[i] = vmdq_rx_conf->dcb_tc[i];  in ixgbe_dev_get_dcb_info()
7278 			dcb_info->prio_tc[i] = rx_conf->dcb_tc[i];  in ixgbe_dev_get_dcb_info()
7279 		if (dcb_info->nb_tcs == RTE_ETH_4_TCS) {  in ixgbe_dev_get_dcb_info()
7280 			for (i = 0; i < dcb_info->nb_tcs; i++) {  in ixgbe_dev_get_dcb_info()
7281 				dcb_info->tc_queue.tc_rxq[0][i].base = i * 32;  in ixgbe_dev_get_dcb_info()
7282 				dcb_info->tc_queue.tc_rxq[0][i].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7284 			dcb_info->tc_queue.tc_txq[0][0].base = 0;  in ixgbe_dev_get_dcb_info()
7285 			dcb_info->tc_queue.tc_txq[0][1].base = 64;  in ixgbe_dev_get_dcb_info()
7286 			dcb_info->tc_queue.tc_txq[0][2].base = 96;  in ixgbe_dev_get_dcb_info()
7287 			dcb_info->tc_queue.tc_txq[0][3].base = 112;  in ixgbe_dev_get_dcb_info()
7288 			dcb_info->tc_queue.tc_txq[0][0].nb_queue = 64;  in ixgbe_dev_get_dcb_info()
7289 			dcb_info->tc_queue.tc_txq[0][1].nb_queue = 32;  in ixgbe_dev_get_dcb_info()
7290 			dcb_info->tc_queue.tc_txq[0][2].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7291 			dcb_info->tc_queue.tc_txq[0][3].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7292 		} else if (dcb_info->nb_tcs == RTE_ETH_8_TCS) {  in ixgbe_dev_get_dcb_info()
7293 			for (i = 0; i < dcb_info->nb_tcs; i++) {  in ixgbe_dev_get_dcb_info()
7294 				dcb_info->tc_queue.tc_rxq[0][i].base = i * 16;  in ixgbe_dev_get_dcb_info()
7295 				dcb_info->tc_queue.tc_rxq[0][i].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7297 			dcb_info->tc_queue.tc_txq[0][0].base = 0;  in ixgbe_dev_get_dcb_info()
7298 			dcb_info->tc_queue.tc_txq[0][1].base = 32;  in ixgbe_dev_get_dcb_info()
7299 			dcb_info->tc_queue.tc_txq[0][2].base = 64;  in ixgbe_dev_get_dcb_info()
7300 			dcb_info->tc_queue.tc_txq[0][3].base = 80;  in ixgbe_dev_get_dcb_info()
7301 			dcb_info->tc_queue.tc_txq[0][4].base = 96;  in ixgbe_dev_get_dcb_info()
7302 			dcb_info->tc_queue.tc_txq[0][5].base = 104;  in ixgbe_dev_get_dcb_info()
7303 			dcb_info->tc_queue.tc_txq[0][6].base = 112;  in ixgbe_dev_get_dcb_info()
7304 			dcb_info->tc_queue.tc_txq[0][7].base = 120;  in ixgbe_dev_get_dcb_info()
7305 			dcb_info->tc_queue.tc_txq[0][0].nb_queue = 32;  in ixgbe_dev_get_dcb_info()
7306 			dcb_info->tc_queue.tc_txq[0][1].nb_queue = 32;  in ixgbe_dev_get_dcb_info()
7307 			dcb_info->tc_queue.tc_txq[0][2].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7308 			dcb_info->tc_queue.tc_txq[0][3].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7309 			dcb_info->tc_queue.tc_txq[0][4].nb_queue = 8;  in ixgbe_dev_get_dcb_info()
7310 			dcb_info->tc_queue.tc_txq[0][5].nb_queue = 8;  in ixgbe_dev_get_dcb_info()
7311 			dcb_info->tc_queue.tc_txq[0][6].nb_queue = 8;  in ixgbe_dev_get_dcb_info()
7312 			dcb_info->tc_queue.tc_txq[0][7].nb_queue = 8;  in ixgbe_dev_get_dcb_info()
7315 	for (i = 0; i < dcb_info->nb_tcs; i++) {  in ixgbe_dev_get_dcb_info()
7317 		dcb_info->tc_bws[i] = tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent;  in ixgbe_dev_get_dcb_info()