Lines Matching refs:reg_val
1071 uint32_t reg_val; in eth_igc_start() local
1073 reg_val = IGC_READ_REG(hw, IGC_CTRL); in eth_igc_start()
1074 reg_val &= ~IGC_CTRL_SPEED_MASK; in eth_igc_start()
1075 reg_val |= IGC_CTRL_SLU | IGC_CTRL_FRCSPD | in eth_igc_start()
1077 IGC_WRITE_REG(hw, IGC_CTRL, reg_val); in eth_igc_start()
2437 uint32_t reg_val; in igc_vlan_hw_filter_enable() local
2441 reg_val = IGC_READ_REG(hw, IGC_RCTL); in igc_vlan_hw_filter_enable()
2442 reg_val &= ~IGC_RCTL_CFIEN; in igc_vlan_hw_filter_enable()
2443 reg_val |= IGC_RCTL_VFE; in igc_vlan_hw_filter_enable()
2444 IGC_WRITE_REG(hw, IGC_RCTL, reg_val); in igc_vlan_hw_filter_enable()
2553 uint32_t reg_val; in eth_igc_vlan_tpid_set() local
2557 reg_val = IGC_READ_REG(hw, IGC_VET); in eth_igc_vlan_tpid_set()
2558 reg_val = (reg_val & (~IGC_VET_EXT)) | in eth_igc_vlan_tpid_set()
2560 IGC_WRITE_REG(hw, IGC_VET, reg_val); in eth_igc_vlan_tpid_set()