Lines Matching defs:dpaa_if_stats
130 struct dpaa_if_stats { struct
132 uint64_t reoct; /**<Rx Eth Octets Counter */
133 uint64_t roct; /**<Rx Octet Counters */
134 uint64_t raln; /**<Rx Alignment Error Counter */
135 uint64_t rxpf; /**<Rx valid Pause Frame */
136 uint64_t rfrm; /**<Rx Frame counter */
137 uint64_t rfcs; /**<Rx frame check seq error */
138 uint64_t rvlan; /**<Rx Vlan Frame Counter */
139 uint64_t rerr; /**<Rx Frame error */
140 uint64_t ruca; /**<Rx Unicast */
141 uint64_t rmca; /**<Rx Multicast */
142 uint64_t rbca; /**<Rx Broadcast */
143 uint64_t rdrp; /**<Rx Dropped Packet */
144 uint64_t rpkt; /**<Rx packet */
145 uint64_t rund; /**<Rx undersized packets */
146 uint32_t res_x[14];
147 uint64_t rovr; /**<Rx oversized but good */
148 uint64_t rjbr; /**<Rx oversized with bad csum */
149 uint64_t rfrg; /**<Rx fragment Packet */
150 uint64_t rcnp; /**<Rx control packets (0x8808 */
151 uint64_t rdrntp; /**<Rx dropped due to FIFO overflow */
152 uint32_t res01d0[12];
154 uint64_t teoct; /**<Tx eth octets */
155 uint64_t toct; /**<Tx Octets */
156 uint32_t res0210[2];
157 uint64_t txpf; /**<Tx valid pause frame */
158 uint64_t tfrm; /**<Tx frame counter */
159 uint64_t tfcs; /**<Tx FCS error */
160 uint64_t tvlan; /**<Tx Vlan Frame */
161 uint64_t terr; /**<Tx frame error */
162 uint64_t tuca; /**<Tx Unicast */
163 uint64_t tmca; /**<Tx Multicast */
164 uint64_t tbca; /**<Tx Broadcast */
165 uint32_t res0258[2];
166 uint64_t tpkt; /**<Tx Packet */
167 uint64_t tund; /**<Tx Undersized */