Lines Matching refs:pdata
110 axgbe_set_tstamp_time(struct axgbe_port *pdata, unsigned int sec,
113 axgbe_update_tstamp_addend(struct axgbe_port *pdata,
277 static int axgbe_phy_reset(struct axgbe_port *pdata) in axgbe_phy_reset() argument
279 pdata->phy_link = -1; in axgbe_phy_reset()
280 pdata->phy_speed = SPEED_UNKNOWN; in axgbe_phy_reset()
281 return pdata->phy_if.phy_reset(pdata); in axgbe_phy_reset()
300 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_interrupt_handler() local
303 pdata->phy_if.an_isr(pdata); in axgbe_dev_interrupt_handler()
305 dma_isr = AXGMAC_IOREAD(pdata, DMA_ISR); in axgbe_dev_interrupt_handler()
311 pdata->rx_queues[0], in axgbe_dev_interrupt_handler()
315 pdata->rx_queues[0], in axgbe_dev_interrupt_handler()
320 rte_intr_ack(pdata->pci_dev->intr_handle); in axgbe_dev_interrupt_handler()
330 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_configure() local
332 pdata->rx_csum_enable = dev->data->dev_conf.rxmode.offloads & in axgbe_dev_configure()
340 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_rx_mq_config() local
343 pdata->rss_enable = 1; in axgbe_dev_rx_mq_config()
345 pdata->rss_enable = 0; in axgbe_dev_rx_mq_config()
354 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_start() local
369 ret = axgbe_phy_reset(pdata); in axgbe_dev_start()
374 ret = pdata->hw_if.init(pdata); in axgbe_dev_start()
381 rte_intr_enable(pdata->pci_dev->intr_handle); in axgbe_dev_start()
384 pdata->phy_if.phy_start(pdata); in axgbe_dev_start()
388 rte_bit_relaxed_clear32(AXGBE_STOPPED, &pdata->dev_state); in axgbe_dev_start()
389 rte_bit_relaxed_clear32(AXGBE_DOWN, &pdata->dev_state); in axgbe_dev_start()
393 max_pkt_len > pdata->rx_buf_size) in axgbe_dev_start()
409 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_stop() local
413 rte_intr_disable(pdata->pci_dev->intr_handle); in axgbe_dev_stop()
415 if (rte_bit_relaxed_get32(AXGBE_STOPPED, &pdata->dev_state)) in axgbe_dev_stop()
418 rte_bit_relaxed_set32(AXGBE_STOPPED, &pdata->dev_state); in axgbe_dev_stop()
422 pdata->phy_if.phy_stop(pdata); in axgbe_dev_stop()
423 pdata->hw_if.exit(pdata); in axgbe_dev_stop()
425 rte_bit_relaxed_set32(AXGBE_DOWN, &pdata->dev_state); in axgbe_dev_stop()
433 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_promiscuous_enable() local
437 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, PR, 1); in axgbe_dev_promiscuous_enable()
445 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_promiscuous_disable() local
449 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, PR, 0); in axgbe_dev_promiscuous_disable()
457 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_allmulticast_enable() local
461 if (AXGMAC_IOREAD_BITS(pdata, MAC_PFR, PM)) in axgbe_dev_allmulticast_enable()
463 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, PM, 1); in axgbe_dev_allmulticast_enable()
471 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_allmulticast_disable() local
475 if (!AXGMAC_IOREAD_BITS(pdata, MAC_PFR, PM)) in axgbe_dev_allmulticast_disable()
477 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, PM, 0); in axgbe_dev_allmulticast_disable()
485 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_mac_addr_set() local
488 axgbe_set_mac_addn_addr(pdata, (u8 *)mac_addr, 0); in axgbe_dev_mac_addr_set()
497 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_mac_addr_add() local
498 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_dev_mac_addr_add()
504 axgbe_set_mac_addn_addr(pdata, (u8 *)mac_addr, index); in axgbe_dev_mac_addr_add()
513 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_rss_reta_update() local
517 if (!pdata->rss_enable) { in axgbe_dev_rss_reta_update()
532 pdata->rss_table[i] = reta_conf[idx].reta[shift]; in axgbe_dev_rss_reta_update()
536 ret = axgbe_write_rss_lookup_table(pdata); in axgbe_dev_rss_reta_update()
545 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_rss_reta_query() local
548 if (!pdata->rss_enable) { in axgbe_dev_rss_reta_query()
563 reta_conf[idx].reta[shift] = pdata->rss_table[i]; in axgbe_dev_rss_reta_query()
572 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_rss_hash_update() local
575 if (!pdata->rss_enable) { in axgbe_dev_rss_hash_update()
587 rte_memcpy(pdata->rss_key, rss_conf->rss_key, in axgbe_dev_rss_hash_update()
590 ret = axgbe_write_rss_hash_key(pdata); in axgbe_dev_rss_hash_update()
595 pdata->rss_hf = rss_conf->rss_hf & AXGBE_RSS_OFFLOAD; in axgbe_dev_rss_hash_update()
597 if (pdata->rss_hf & (RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_IPV6)) in axgbe_dev_rss_hash_update()
598 AXGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, IP2TE, 1); in axgbe_dev_rss_hash_update()
599 if (pdata->rss_hf & in axgbe_dev_rss_hash_update()
601 AXGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, TCP4TE, 1); in axgbe_dev_rss_hash_update()
602 if (pdata->rss_hf & in axgbe_dev_rss_hash_update()
604 AXGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, UDP4TE, 1); in axgbe_dev_rss_hash_update()
607 AXGMAC_IOWRITE(pdata, MAC_RSSCR, pdata->rss_options); in axgbe_dev_rss_hash_update()
616 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_rss_hash_conf_get() local
618 if (!pdata->rss_enable) { in axgbe_dev_rss_hash_conf_get()
630 rte_memcpy(rss_conf->rss_key, pdata->rss_key, in axgbe_dev_rss_hash_conf_get()
634 rss_conf->rss_hf = pdata->rss_hf; in axgbe_dev_rss_hash_conf_get()
655 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_mac_addr_remove() local
656 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_dev_mac_addr_remove()
662 axgbe_set_mac_addn_addr(pdata, NULL, index); in axgbe_dev_mac_addr_remove()
670 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_set_mc_addr_list() local
671 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_dev_set_mc_addr_list()
689 axgbe_set_mac_addn_addr(pdata, (u8 *)mc_addr_set++, index++); in axgbe_dev_set_mc_addr_list()
698 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_uc_hash_table_set() local
699 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_dev_uc_hash_table_set()
706 axgbe_set_mac_hash_table(pdata, (u8 *)mac_addr, add); in axgbe_dev_uc_hash_table_set()
708 if (pdata->uc_hash_mac_addr > 0) { in axgbe_dev_uc_hash_table_set()
709 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 1); in axgbe_dev_uc_hash_table_set()
710 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 1); in axgbe_dev_uc_hash_table_set()
712 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 0); in axgbe_dev_uc_hash_table_set()
713 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 0); in axgbe_dev_uc_hash_table_set()
721 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_uc_all_hash_table_set() local
722 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_dev_uc_all_hash_table_set()
730 for (index = 0; index < pdata->hash_table_count; index++) { in axgbe_dev_uc_all_hash_table_set()
732 pdata->uc_hash_table[index] = ~0; in axgbe_dev_uc_all_hash_table_set()
734 pdata->uc_hash_table[index] = 0; in axgbe_dev_uc_all_hash_table_set()
739 AXGMAC_IOWRITE(pdata, MAC_HTR(index), in axgbe_dev_uc_all_hash_table_set()
740 pdata->uc_hash_table[index]); in axgbe_dev_uc_all_hash_table_set()
744 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 1); in axgbe_dev_uc_all_hash_table_set()
745 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 1); in axgbe_dev_uc_all_hash_table_set()
747 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 0); in axgbe_dev_uc_all_hash_table_set()
748 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 0); in axgbe_dev_uc_all_hash_table_set()
758 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_link_update() local
765 pdata->phy_if.phy_status(pdata); in axgbe_dev_link_update()
768 link.link_duplex = pdata->phy.duplex; in axgbe_dev_link_update()
769 link.link_status = pdata->phy_link; in axgbe_dev_link_update()
770 link.link_speed = pdata->phy_speed; in axgbe_dev_link_update()
783 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_get_regs() local
786 regs->length = axgbe_regs_get_count(pdata); in axgbe_dev_get_regs()
793 regs->length != (uint32_t)axgbe_regs_get_count(pdata)) in axgbe_dev_get_regs()
796 regs->version = pdata->pci_dev->id.vendor_id << 16 | in axgbe_dev_get_regs()
797 pdata->pci_dev->id.device_id; in axgbe_dev_get_regs()
798 axgbe_regs_dump(pdata, regs->data); in axgbe_dev_get_regs()
801 static void axgbe_read_mmc_stats(struct axgbe_port *pdata) in axgbe_read_mmc_stats() argument
803 struct axgbe_mmc_stats *stats = &pdata->mmc_stats; in axgbe_read_mmc_stats()
806 AXGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 1); in axgbe_read_mmc_stats()
810 AXGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_GB_LO); in axgbe_read_mmc_stats()
812 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_GB_HI) << 32); in axgbe_read_mmc_stats()
815 AXGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_GB_LO); in axgbe_read_mmc_stats()
817 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_GB_HI) << 32); in axgbe_read_mmc_stats()
820 AXGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_G_LO); in axgbe_read_mmc_stats()
822 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
825 AXGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_G_LO); in axgbe_read_mmc_stats()
827 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
830 AXGMAC_IOREAD(pdata, MMC_TX64OCTETS_GB_LO); in axgbe_read_mmc_stats()
832 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX64OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
835 AXGMAC_IOREAD(pdata, MMC_TX65TO127OCTETS_GB_LO); in axgbe_read_mmc_stats()
837 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX65TO127OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
840 AXGMAC_IOREAD(pdata, MMC_TX128TO255OCTETS_GB_LO); in axgbe_read_mmc_stats()
842 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX128TO255OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
845 AXGMAC_IOREAD(pdata, MMC_TX256TO511OCTETS_GB_LO); in axgbe_read_mmc_stats()
847 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX256TO511OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
850 AXGMAC_IOREAD(pdata, MMC_TX512TO1023OCTETS_GB_LO); in axgbe_read_mmc_stats()
852 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX512TO1023OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
855 AXGMAC_IOREAD(pdata, MMC_TX1024TOMAXOCTETS_GB_LO); in axgbe_read_mmc_stats()
857 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX1024TOMAXOCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
860 AXGMAC_IOREAD(pdata, MMC_TXUNICASTFRAMES_GB_LO); in axgbe_read_mmc_stats()
862 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXUNICASTFRAMES_GB_HI) << 32); in axgbe_read_mmc_stats()
865 AXGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_GB_LO); in axgbe_read_mmc_stats()
867 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_GB_HI) << 32); in axgbe_read_mmc_stats()
870 AXGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_GB_LO); in axgbe_read_mmc_stats()
872 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_GB_HI) << 32); in axgbe_read_mmc_stats()
875 AXGMAC_IOREAD(pdata, MMC_TXUNDERFLOWERROR_LO); in axgbe_read_mmc_stats()
877 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXUNDERFLOWERROR_HI) << 32); in axgbe_read_mmc_stats()
880 AXGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_G_LO); in axgbe_read_mmc_stats()
882 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_G_HI) << 32); in axgbe_read_mmc_stats()
885 AXGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_G_LO); in axgbe_read_mmc_stats()
887 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_G_HI) << 32); in axgbe_read_mmc_stats()
890 AXGMAC_IOREAD(pdata, MMC_TXPAUSEFRAMES_LO); in axgbe_read_mmc_stats()
892 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXPAUSEFRAMES_HI) << 32); in axgbe_read_mmc_stats()
895 AXGMAC_IOREAD(pdata, MMC_TXVLANFRAMES_G_LO); in axgbe_read_mmc_stats()
897 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXVLANFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
901 AXGMAC_IOREAD(pdata, MMC_RXFRAMECOUNT_GB_LO); in axgbe_read_mmc_stats()
903 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXFRAMECOUNT_GB_HI) << 32); in axgbe_read_mmc_stats()
906 AXGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_GB_LO); in axgbe_read_mmc_stats()
908 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_GB_HI) << 32); in axgbe_read_mmc_stats()
911 AXGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_G_LO); in axgbe_read_mmc_stats()
913 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_G_HI) << 32); in axgbe_read_mmc_stats()
916 AXGMAC_IOREAD(pdata, MMC_RXBROADCASTFRAMES_G_LO); in axgbe_read_mmc_stats()
918 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXBROADCASTFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
921 AXGMAC_IOREAD(pdata, MMC_RXMULTICASTFRAMES_G_LO); in axgbe_read_mmc_stats()
923 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXMULTICASTFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
926 AXGMAC_IOREAD(pdata, MMC_RXCRCERROR_LO); in axgbe_read_mmc_stats()
928 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXCRCERROR_HI) << 32); in axgbe_read_mmc_stats()
931 AXGMAC_IOREAD(pdata, MMC_RXRUNTERROR); in axgbe_read_mmc_stats()
934 AXGMAC_IOREAD(pdata, MMC_RXJABBERERROR); in axgbe_read_mmc_stats()
937 AXGMAC_IOREAD(pdata, MMC_RXUNDERSIZE_G); in axgbe_read_mmc_stats()
940 AXGMAC_IOREAD(pdata, MMC_RXOVERSIZE_G); in axgbe_read_mmc_stats()
943 AXGMAC_IOREAD(pdata, MMC_RX64OCTETS_GB_LO); in axgbe_read_mmc_stats()
945 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX64OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
948 AXGMAC_IOREAD(pdata, MMC_RX65TO127OCTETS_GB_LO); in axgbe_read_mmc_stats()
950 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX65TO127OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
953 AXGMAC_IOREAD(pdata, MMC_RX128TO255OCTETS_GB_LO); in axgbe_read_mmc_stats()
955 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX128TO255OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
958 AXGMAC_IOREAD(pdata, MMC_RX256TO511OCTETS_GB_LO); in axgbe_read_mmc_stats()
960 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX256TO511OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
963 AXGMAC_IOREAD(pdata, MMC_RX512TO1023OCTETS_GB_LO); in axgbe_read_mmc_stats()
965 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX512TO1023OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
968 AXGMAC_IOREAD(pdata, MMC_RX1024TOMAXOCTETS_GB_LO); in axgbe_read_mmc_stats()
970 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX1024TOMAXOCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
973 AXGMAC_IOREAD(pdata, MMC_RXUNICASTFRAMES_G_LO); in axgbe_read_mmc_stats()
975 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXUNICASTFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
978 AXGMAC_IOREAD(pdata, MMC_RXLENGTHERROR_LO); in axgbe_read_mmc_stats()
980 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXLENGTHERROR_HI) << 32); in axgbe_read_mmc_stats()
983 AXGMAC_IOREAD(pdata, MMC_RXOUTOFRANGETYPE_LO); in axgbe_read_mmc_stats()
985 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXOUTOFRANGETYPE_HI) << 32); in axgbe_read_mmc_stats()
988 AXGMAC_IOREAD(pdata, MMC_RXPAUSEFRAMES_LO); in axgbe_read_mmc_stats()
990 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXPAUSEFRAMES_HI) << 32); in axgbe_read_mmc_stats()
993 AXGMAC_IOREAD(pdata, MMC_RXFIFOOVERFLOW_LO); in axgbe_read_mmc_stats()
995 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXFIFOOVERFLOW_HI) << 32); in axgbe_read_mmc_stats()
998 AXGMAC_IOREAD(pdata, MMC_RXVLANFRAMES_GB_LO); in axgbe_read_mmc_stats()
1000 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXVLANFRAMES_GB_HI) << 32); in axgbe_read_mmc_stats()
1003 AXGMAC_IOREAD(pdata, MMC_RXWATCHDOGERROR); in axgbe_read_mmc_stats()
1006 AXGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 0); in axgbe_read_mmc_stats()
1013 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_xstats_get() local
1019 axgbe_read_mmc_stats(pdata); in axgbe_dev_xstats_get()
1023 stats[i].value = *(u64 *)((uint8_t *)&pdata->mmc_stats + in axgbe_dev_xstats_get()
1056 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_xstats_get_by_id() local
1061 axgbe_read_mmc_stats(pdata); in axgbe_dev_xstats_get_by_id()
1064 values[i] = *(u64 *)((uint8_t *)&pdata->mmc_stats + in axgbe_dev_xstats_get_by_id()
1110 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_xstats_reset() local
1111 struct axgbe_mmc_stats *stats = &pdata->mmc_stats; in axgbe_dev_xstats_reset()
1114 axgbe_read_mmc_stats(pdata); in axgbe_dev_xstats_reset()
1128 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_stats_get() local
1129 struct axgbe_mmc_stats *mmc_stats = &pdata->mmc_stats; in axgbe_dev_stats_get()
1132 axgbe_read_mmc_stats(pdata); in axgbe_dev_stats_get()
1207 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_info_get() local
1209 dev_info->max_rx_queues = pdata->rx_ring_count; in axgbe_dev_info_get()
1210 dev_info->max_tx_queues = pdata->tx_ring_count; in axgbe_dev_info_get()
1213 dev_info->max_mac_addrs = pdata->hw_feat.addn_mac + 1; in axgbe_dev_info_get()
1214 dev_info->max_hash_mac_addrs = pdata->hw_feat.hash_table_size; in axgbe_dev_info_get()
1234 if (pdata->hw_feat.rss) { in axgbe_dev_info_get()
1236 dev_info->reta_size = pdata->hw_feat.hash_table_size; in axgbe_dev_info_get()
1257 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_flow_ctrl_get() local
1258 struct xgbe_fc_info fc = pdata->fc; in axgbe_flow_ctrl_get()
1262 reg_val = AXGMAC_IOREAD(pdata, reg); in axgbe_flow_ctrl_get()
1263 fc.low_water[0] = AXGMAC_MTL_IOREAD_BITS(pdata, 0, MTL_Q_RQFCR, RFA); in axgbe_flow_ctrl_get()
1264 fc.high_water[0] = AXGMAC_MTL_IOREAD_BITS(pdata, 0, MTL_Q_RQFCR, RFD); in axgbe_flow_ctrl_get()
1266 fc.autoneg = pdata->pause_autoneg; in axgbe_flow_ctrl_get()
1268 if (pdata->rx_pause && pdata->tx_pause) in axgbe_flow_ctrl_get()
1270 else if (pdata->rx_pause) in axgbe_flow_ctrl_get()
1272 else if (pdata->tx_pause) in axgbe_flow_ctrl_get()
1289 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_flow_ctrl_set() local
1290 struct xgbe_fc_info fc = pdata->fc; in axgbe_flow_ctrl_set()
1294 pdata->pause_autoneg = fc_conf->autoneg; in axgbe_flow_ctrl_set()
1295 pdata->phy.pause_autoneg = pdata->pause_autoneg; in axgbe_flow_ctrl_set()
1297 AXGMAC_MTL_IOWRITE_BITS(pdata, 0, MTL_Q_RQFCR, RFA, in axgbe_flow_ctrl_set()
1299 AXGMAC_MTL_IOWRITE_BITS(pdata, 0, MTL_Q_RQFCR, RFD, in axgbe_flow_ctrl_set()
1302 AXGMAC_IOWRITE(pdata, reg, reg_val); in axgbe_flow_ctrl_set()
1306 pdata->tx_pause = 1; in axgbe_flow_ctrl_set()
1307 pdata->rx_pause = 1; in axgbe_flow_ctrl_set()
1309 pdata->tx_pause = 0; in axgbe_flow_ctrl_set()
1310 pdata->rx_pause = 1; in axgbe_flow_ctrl_set()
1312 pdata->tx_pause = 1; in axgbe_flow_ctrl_set()
1313 pdata->rx_pause = 0; in axgbe_flow_ctrl_set()
1315 pdata->tx_pause = 0; in axgbe_flow_ctrl_set()
1316 pdata->rx_pause = 0; in axgbe_flow_ctrl_set()
1319 if (pdata->tx_pause != (unsigned int)pdata->phy.tx_pause) in axgbe_flow_ctrl_set()
1320 pdata->hw_if.config_tx_flow_control(pdata); in axgbe_flow_ctrl_set()
1322 if (pdata->rx_pause != (unsigned int)pdata->phy.rx_pause) in axgbe_flow_ctrl_set()
1323 pdata->hw_if.config_rx_flow_control(pdata); in axgbe_flow_ctrl_set()
1325 pdata->hw_if.config_flow_control(pdata); in axgbe_flow_ctrl_set()
1326 pdata->phy.tx_pause = pdata->tx_pause; in axgbe_flow_ctrl_set()
1327 pdata->phy.rx_pause = pdata->rx_pause; in axgbe_flow_ctrl_set()
1336 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_priority_flow_ctrl_set() local
1337 struct xgbe_fc_info fc = pdata->fc; in axgbe_priority_flow_ctrl_set()
1340 tc_num = pdata->pfc_map[pfc_conf->priority]; in axgbe_priority_flow_ctrl_set()
1342 if (pfc_conf->priority >= pdata->hw_feat.tc_cnt) { in axgbe_priority_flow_ctrl_set()
1344 pdata->hw_feat.tc_cnt); in axgbe_priority_flow_ctrl_set()
1348 pdata->pause_autoneg = pfc_conf->fc.autoneg; in axgbe_priority_flow_ctrl_set()
1349 pdata->phy.pause_autoneg = pdata->pause_autoneg; in axgbe_priority_flow_ctrl_set()
1351 AXGMAC_MTL_IOWRITE_BITS(pdata, tc_num, MTL_Q_RQFCR, RFA, in axgbe_priority_flow_ctrl_set()
1353 AXGMAC_MTL_IOWRITE_BITS(pdata, tc_num, MTL_Q_RQFCR, RFD, in axgbe_priority_flow_ctrl_set()
1358 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM0R, in axgbe_priority_flow_ctrl_set()
1362 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM0R, in axgbe_priority_flow_ctrl_set()
1366 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM0R, in axgbe_priority_flow_ctrl_set()
1370 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM0R, in axgbe_priority_flow_ctrl_set()
1374 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM1R, in axgbe_priority_flow_ctrl_set()
1378 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM1R, in axgbe_priority_flow_ctrl_set()
1382 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM1R, in axgbe_priority_flow_ctrl_set()
1386 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM1R, in axgbe_priority_flow_ctrl_set()
1394 pdata->tx_pause = 1; in axgbe_priority_flow_ctrl_set()
1395 pdata->rx_pause = 1; in axgbe_priority_flow_ctrl_set()
1396 AXGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, 1); in axgbe_priority_flow_ctrl_set()
1398 pdata->tx_pause = 0; in axgbe_priority_flow_ctrl_set()
1399 pdata->rx_pause = 1; in axgbe_priority_flow_ctrl_set()
1400 AXGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, 1); in axgbe_priority_flow_ctrl_set()
1402 pdata->tx_pause = 1; in axgbe_priority_flow_ctrl_set()
1403 pdata->rx_pause = 0; in axgbe_priority_flow_ctrl_set()
1404 AXGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, 0); in axgbe_priority_flow_ctrl_set()
1406 pdata->tx_pause = 0; in axgbe_priority_flow_ctrl_set()
1407 pdata->rx_pause = 0; in axgbe_priority_flow_ctrl_set()
1408 AXGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, 0); in axgbe_priority_flow_ctrl_set()
1411 if (pdata->tx_pause != (unsigned int)pdata->phy.tx_pause) in axgbe_priority_flow_ctrl_set()
1412 pdata->hw_if.config_tx_flow_control(pdata); in axgbe_priority_flow_ctrl_set()
1414 if (pdata->rx_pause != (unsigned int)pdata->phy.rx_pause) in axgbe_priority_flow_ctrl_set()
1415 pdata->hw_if.config_rx_flow_control(pdata); in axgbe_priority_flow_ctrl_set()
1416 pdata->hw_if.config_flow_control(pdata); in axgbe_priority_flow_ctrl_set()
1417 pdata->phy.tx_pause = pdata->tx_pause; in axgbe_priority_flow_ctrl_set()
1418 pdata->phy.rx_pause = pdata->rx_pause; in axgbe_priority_flow_ctrl_set()
1484 struct axgbe_port *pdata = dev->data->dev_private; in axgb_mtu_set() local
1494 AXGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val); in axgb_mtu_set()
1500 axgbe_update_tstamp_time(struct axgbe_port *pdata, in axgbe_update_tstamp_time() argument
1514 AXGMAC_IOWRITE(pdata, MAC_STSUR, sub_val); in axgbe_update_tstamp_time()
1516 AXGMAC_IOWRITE(pdata, MAC_STNUR, sub_val); in axgbe_update_tstamp_time()
1517 AXGMAC_IOWRITE_BITS(pdata, MAC_STNUR, ADDSUB, 1); in axgbe_update_tstamp_time()
1519 AXGMAC_IOWRITE(pdata, MAC_STSUR, sec); in axgbe_update_tstamp_time()
1520 AXGMAC_IOWRITE_BITS(pdata, MAC_STNUR, ADDSUB, 0); in axgbe_update_tstamp_time()
1521 AXGMAC_IOWRITE(pdata, MAC_STNUR, nsec); in axgbe_update_tstamp_time()
1523 AXGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSUPDT, 1); in axgbe_update_tstamp_time()
1525 while (--count && AXGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSUPDT)) in axgbe_update_tstamp_time()
1544 axgbe_adjfreq(struct axgbe_port *pdata, int64_t delta) in axgbe_adjfreq() argument
1554 adjust = (uint64_t)pdata->tstamp_addend; in axgbe_adjfreq()
1557 addend = (neg_adjust) ? pdata->tstamp_addend - diff : in axgbe_adjfreq()
1558 pdata->tstamp_addend + diff; in axgbe_adjfreq()
1559 pdata->tstamp_addend = addend; in axgbe_adjfreq()
1560 axgbe_update_tstamp_addend(pdata, addend); in axgbe_adjfreq()
1567 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_adjust_time() local
1570 axgbe_adjfreq(pdata, delta); in axgbe_timesync_adjust_time()
1571 pdata->systime_tc.nsec += delta; in axgbe_timesync_adjust_time()
1576 axgbe_update_tstamp_time(pdata, timestamp_delta.tv_sec, in axgbe_timesync_adjust_time()
1580 axgbe_update_tstamp_time(pdata, timestamp_delta.tv_sec, in axgbe_timesync_adjust_time()
1591 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_read_time() local
1593 nsec = AXGMAC_IOREAD(pdata, MAC_STSR); in axgbe_timesync_read_time()
1595 nsec += AXGMAC_IOREAD(pdata, MAC_STNR); in axgbe_timesync_read_time()
1604 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_write_time() local
1606 AXGMAC_IOWRITE(pdata, MAC_STSUR, timestamp->tv_sec); in axgbe_timesync_write_time()
1607 AXGMAC_IOWRITE(pdata, MAC_STNUR, timestamp->tv_nsec); in axgbe_timesync_write_time()
1608 AXGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSUPDT, 1); in axgbe_timesync_write_time()
1610 while (--count && AXGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSUPDT)) in axgbe_timesync_write_time()
1618 axgbe_update_tstamp_addend(struct axgbe_port *pdata, in axgbe_update_tstamp_addend() argument
1623 AXGMAC_IOWRITE(pdata, MAC_TSAR, addend); in axgbe_update_tstamp_addend()
1624 AXGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1); in axgbe_update_tstamp_addend()
1627 while (--count && AXGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSADDREG)) in axgbe_update_tstamp_addend()
1634 axgbe_set_tstamp_time(struct axgbe_port *pdata, unsigned int sec, in axgbe_set_tstamp_time() argument
1640 AXGMAC_IOWRITE(pdata, MAC_STSUR, sec); in axgbe_set_tstamp_time()
1642 AXGMAC_IOWRITE(pdata, MAC_STNUR, nsec); in axgbe_set_tstamp_time()
1644 AXGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1); in axgbe_set_tstamp_time()
1647 while (--count && AXGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSINIT)) in axgbe_set_tstamp_time()
1656 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_enable() local
1671 AXGMAC_IOWRITE(pdata, MAC_TSCR, mac_tscr); in axgbe_timesync_enable()
1681 AXGMAC_IOWRITE(pdata, MAC_TSCR, mac_tscr); in axgbe_timesync_enable()
1690 AXGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, AXGBE_TSTAMP_SSINC); in axgbe_timesync_enable()
1692 AXGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, AXGBE_TSTAMP_SNSINC); in axgbe_timesync_enable()
1694 pdata->ptpclk_rate = AXGBE_V2_PTP_CLOCK_FREQ; in axgbe_timesync_enable()
1697 pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate); in axgbe_timesync_enable()
1699 axgbe_update_tstamp_addend(pdata, pdata->tstamp_addend); in axgbe_timesync_enable()
1700 axgbe_set_tstamp_time(pdata, 0, 0); in axgbe_timesync_enable()
1703 memset(&pdata->systime_tc, 0, sizeof(struct rte_timecounter)); in axgbe_timesync_enable()
1705 pdata->systime_tc.cc_mask = AXGBE_CYCLECOUNTER_MASK; in axgbe_timesync_enable()
1706 pdata->systime_tc.cc_shift = 0; in axgbe_timesync_enable()
1707 pdata->systime_tc.nsec_mask = 0; in axgbe_timesync_enable()
1714 nsec = rte_timecounter_update(&pdata->systime_tc, nsec); in axgbe_timesync_enable()
1715 axgbe_set_tstamp_time(pdata, timestamp.tv_sec, timestamp.tv_nsec); in axgbe_timesync_enable()
1722 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_disable() local
1728 AXGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 0); in axgbe_timesync_disable()
1777 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_read_tx_timestamp() local
1781 if (pdata->vdata->tx_tstamp_workaround) { in axgbe_timesync_read_tx_timestamp()
1782 tx_snr = AXGMAC_IOREAD(pdata, MAC_TXSNR); in axgbe_timesync_read_tx_timestamp()
1783 tx_ssr = AXGMAC_IOREAD(pdata, MAC_TXSSR); in axgbe_timesync_read_tx_timestamp()
1786 tx_ssr = AXGMAC_IOREAD(pdata, MAC_TXSSR); in axgbe_timesync_read_tx_timestamp()
1787 tx_snr = AXGMAC_IOREAD(pdata, MAC_TXSNR); in axgbe_timesync_read_tx_timestamp()
1805 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_vlan_filter_set() local
1813 vid, pdata->eth_dev->device->name); in axgbe_vlan_filter_set()
1814 pdata->active_vlans[vid_idx] |= vid_bit; in axgbe_vlan_filter_set()
1817 vid, pdata->eth_dev->device->name); in axgbe_vlan_filter_set()
1818 pdata->active_vlans[vid_idx] &= ~vid_bit; in axgbe_vlan_filter_set()
1820 pdata->hw_if.update_vlan_hash_table(pdata); in axgbe_vlan_filter_set()
1829 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_vlan_tpid_set() local
1833 qinq = AXGMAC_IOREAD_BITS(pdata, MAC_VLANTR, EDVLP); in axgbe_vlan_tpid_set()
1846 AXGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ERIVLT, 1); in axgbe_vlan_tpid_set()
1847 reg = AXGMAC_IOREAD_BITS(pdata, MAC_VLANTR, ERIVLT); in axgbe_vlan_tpid_set()
1860 AXGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ERIVLT, 0); in axgbe_vlan_tpid_set()
1861 reg = AXGMAC_IOREAD_BITS(pdata, MAC_VLANTR, ERIVLT); in axgbe_vlan_tpid_set()
1864 AXGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, CSVL, 1); in axgbe_vlan_tpid_set()
1865 reg = AXGMAC_IOREAD_BITS(pdata, MAC_VLANIR, CSVL); in axgbe_vlan_tpid_set()
1883 static void axgbe_vlan_extend_enable(struct axgbe_port *pdata) in axgbe_vlan_extend_enable() argument
1887 AXGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EDVLP, 1); in axgbe_vlan_extend_enable()
1888 qinq = AXGMAC_IOREAD_BITS(pdata, MAC_VLANTR, EDVLP); in axgbe_vlan_extend_enable()
1892 static void axgbe_vlan_extend_disable(struct axgbe_port *pdata) in axgbe_vlan_extend_disable() argument
1896 AXGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EDVLP, 0); in axgbe_vlan_extend_disable()
1897 qinq = AXGMAC_IOREAD_BITS(pdata, MAC_VLANTR, EDVLP); in axgbe_vlan_extend_disable()
1905 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_vlan_offload_set() local
1908 AXGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, CSVL, 0); in axgbe_vlan_offload_set()
1909 AXGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, VLTI, 1); in axgbe_vlan_offload_set()
1914 pdata->eth_dev->device->name); in axgbe_vlan_offload_set()
1915 pdata->hw_if.enable_rx_vlan_stripping(pdata); in axgbe_vlan_offload_set()
1918 pdata->eth_dev->device->name); in axgbe_vlan_offload_set()
1919 pdata->hw_if.disable_rx_vlan_stripping(pdata); in axgbe_vlan_offload_set()
1925 pdata->eth_dev->device->name); in axgbe_vlan_offload_set()
1926 pdata->hw_if.enable_rx_vlan_filtering(pdata); in axgbe_vlan_offload_set()
1929 pdata->eth_dev->device->name); in axgbe_vlan_offload_set()
1930 pdata->hw_if.disable_rx_vlan_filtering(pdata); in axgbe_vlan_offload_set()
1936 axgbe_vlan_extend_enable(pdata); in axgbe_vlan_offload_set()
1944 axgbe_vlan_extend_disable(pdata); in axgbe_vlan_offload_set()
1950 static void axgbe_get_all_hw_features(struct axgbe_port *pdata) in axgbe_get_all_hw_features() argument
1953 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_get_all_hw_features()
1955 mac_hfr0 = AXGMAC_IOREAD(pdata, MAC_HWF0R); in axgbe_get_all_hw_features()
1956 mac_hfr1 = AXGMAC_IOREAD(pdata, MAC_HWF1R); in axgbe_get_all_hw_features()
1957 mac_hfr2 = AXGMAC_IOREAD(pdata, MAC_HWF2R); in axgbe_get_all_hw_features()
1958 mac_hfr3 = AXGMAC_IOREAD(pdata, MAC_HWF3R); in axgbe_get_all_hw_features()
1962 hw_feat->version = AXGMAC_IOREAD(pdata, MAC_VR); in axgbe_get_all_hw_features()
2059 static void axgbe_init_all_fptrs(struct axgbe_port *pdata) in axgbe_init_all_fptrs() argument
2061 axgbe_init_function_ptrs_dev(&pdata->hw_if); in axgbe_init_all_fptrs()
2062 axgbe_init_function_ptrs_phy(&pdata->phy_if); in axgbe_init_all_fptrs()
2063 axgbe_init_function_ptrs_i2c(&pdata->i2c_if); in axgbe_init_all_fptrs()
2064 pdata->vdata->init_function_ptrs_phy_impl(&pdata->phy_if); in axgbe_init_all_fptrs()
2067 static void axgbe_set_counts(struct axgbe_port *pdata) in axgbe_set_counts() argument
2070 axgbe_init_all_fptrs(pdata); in axgbe_set_counts()
2073 axgbe_get_all_hw_features(pdata); in axgbe_set_counts()
2076 if (!pdata->tx_max_channel_count) in axgbe_set_counts()
2077 pdata->tx_max_channel_count = pdata->hw_feat.tx_ch_cnt; in axgbe_set_counts()
2078 if (!pdata->rx_max_channel_count) in axgbe_set_counts()
2079 pdata->rx_max_channel_count = pdata->hw_feat.rx_ch_cnt; in axgbe_set_counts()
2081 if (!pdata->tx_max_q_count) in axgbe_set_counts()
2082 pdata->tx_max_q_count = pdata->hw_feat.tx_q_cnt; in axgbe_set_counts()
2083 if (!pdata->rx_max_q_count) in axgbe_set_counts()
2084 pdata->rx_max_q_count = pdata->hw_feat.rx_q_cnt; in axgbe_set_counts()
2093 pdata->tx_ring_count = RTE_MIN(pdata->hw_feat.tx_ch_cnt, in axgbe_set_counts()
2094 pdata->tx_max_channel_count); in axgbe_set_counts()
2095 pdata->tx_ring_count = RTE_MIN(pdata->tx_ring_count, in axgbe_set_counts()
2096 pdata->tx_max_q_count); in axgbe_set_counts()
2098 pdata->tx_q_count = pdata->tx_ring_count; in axgbe_set_counts()
2100 pdata->rx_ring_count = RTE_MIN(pdata->hw_feat.rx_ch_cnt, in axgbe_set_counts()
2101 pdata->rx_max_channel_count); in axgbe_set_counts()
2103 pdata->rx_q_count = RTE_MIN(pdata->hw_feat.rx_q_cnt, in axgbe_set_counts()
2104 pdata->rx_max_q_count); in axgbe_set_counts()
2107 static void axgbe_default_config(struct axgbe_port *pdata) in axgbe_default_config() argument
2109 pdata->pblx8 = DMA_PBL_X8_ENABLE; in axgbe_default_config()
2110 pdata->tx_sf_mode = MTL_TSF_ENABLE; in axgbe_default_config()
2111 pdata->tx_threshold = MTL_TX_THRESHOLD_64; in axgbe_default_config()
2112 pdata->tx_pbl = DMA_PBL_32; in axgbe_default_config()
2113 pdata->tx_osp_mode = DMA_OSP_ENABLE; in axgbe_default_config()
2114 pdata->rx_sf_mode = MTL_RSF_ENABLE; in axgbe_default_config()
2115 pdata->rx_threshold = MTL_RX_THRESHOLD_64; in axgbe_default_config()
2116 pdata->rx_pbl = DMA_PBL_32; in axgbe_default_config()
2117 pdata->pause_autoneg = 1; in axgbe_default_config()
2118 pdata->tx_pause = 0; in axgbe_default_config()
2119 pdata->rx_pause = 0; in axgbe_default_config()
2120 pdata->phy_speed = SPEED_UNKNOWN; in axgbe_default_config()
2121 pdata->power_down = 0; in axgbe_default_config()
2154 struct axgbe_port *pdata; in eth_axgbe_dev_init() local
2174 pdata = eth_dev->data->dev_private; in eth_axgbe_dev_init()
2176 rte_bit_relaxed_set32(AXGBE_DOWN, &pdata->dev_state); in eth_axgbe_dev_init()
2177 rte_bit_relaxed_set32(AXGBE_STOPPED, &pdata->dev_state); in eth_axgbe_dev_init()
2178 pdata->eth_dev = eth_dev; in eth_axgbe_dev_init()
2181 pdata->pci_dev = pci_dev; in eth_axgbe_dev_init()
2183 pdata->xgmac_regs = in eth_axgbe_dev_init()
2185 pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs in eth_axgbe_dev_init()
2187 pdata->xi2c_regs = (void *)((uint8_t *)pdata->xgmac_regs in eth_axgbe_dev_init()
2189 pdata->xpcs_regs = (void *)pci_dev->mem_resource[AXGBE_XPCS_BAR].addr; in eth_axgbe_dev_init()
2193 pdata->vdata = &axgbe_v2a; in eth_axgbe_dev_init()
2195 pdata->vdata = &axgbe_v2b; in eth_axgbe_dev_init()
2202 pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF; in eth_axgbe_dev_init()
2203 pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT; in eth_axgbe_dev_init()
2206 pdata->xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF; in eth_axgbe_dev_init()
2207 pdata->xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT; in eth_axgbe_dev_init()
2209 pdata->vdata->an_cdr_workaround = 0; in eth_axgbe_dev_init()
2212 pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF; in eth_axgbe_dev_init()
2213 pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT; in eth_axgbe_dev_init()
2221 reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg); in eth_axgbe_dev_init()
2222 pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET); in eth_axgbe_dev_init()
2223 pdata->xpcs_window <<= 6; in eth_axgbe_dev_init()
2224 pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE); in eth_axgbe_dev_init()
2225 pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7); in eth_axgbe_dev_init()
2226 pdata->xpcs_window_mask = pdata->xpcs_window_size - 1; in eth_axgbe_dev_init()
2229 "xpcs window :%x, size :%x, mask :%x ", pdata->xpcs_window, in eth_axgbe_dev_init()
2230 pdata->xpcs_window_size, pdata->xpcs_window_mask); in eth_axgbe_dev_init()
2231 XP_IOWRITE(pdata, XP_INT_EN, 0x1fffff); in eth_axgbe_dev_init()
2234 mac_lo = XP_IOREAD(pdata, XP_MAC_ADDR_LO); in eth_axgbe_dev_init()
2235 mac_hi = XP_IOREAD(pdata, XP_MAC_ADDR_HI); in eth_axgbe_dev_init()
2236 pdata->mac_addr.addr_bytes[0] = mac_lo & 0xff; in eth_axgbe_dev_init()
2237 pdata->mac_addr.addr_bytes[1] = (mac_lo >> 8) & 0xff; in eth_axgbe_dev_init()
2238 pdata->mac_addr.addr_bytes[2] = (mac_lo >> 16) & 0xff; in eth_axgbe_dev_init()
2239 pdata->mac_addr.addr_bytes[3] = (mac_lo >> 24) & 0xff; in eth_axgbe_dev_init()
2240 pdata->mac_addr.addr_bytes[4] = mac_hi & 0xff; in eth_axgbe_dev_init()
2241 pdata->mac_addr.addr_bytes[5] = (mac_hi >> 8) & 0xff; in eth_axgbe_dev_init()
2265 if (!rte_is_valid_assigned_ether_addr(&pdata->mac_addr)) in eth_axgbe_dev_init()
2266 rte_eth_random_addr(pdata->mac_addr.addr_bytes); in eth_axgbe_dev_init()
2269 rte_ether_addr_copy(&pdata->mac_addr, ð_dev->data->mac_addrs[0]); in eth_axgbe_dev_init()
2272 pdata->sysclk_rate = AXGBE_V2_DMA_CLOCK_FREQ; in eth_axgbe_dev_init()
2273 pdata->ptpclk_rate = AXGBE_V2_PTP_CLOCK_FREQ; in eth_axgbe_dev_init()
2276 pdata->coherent = 1; in eth_axgbe_dev_init()
2277 pdata->axdomain = AXGBE_DMA_OS_AXDOMAIN; in eth_axgbe_dev_init()
2278 pdata->arcache = AXGBE_DMA_OS_ARCACHE; in eth_axgbe_dev_init()
2279 pdata->awcache = AXGBE_DMA_OS_AWCACHE; in eth_axgbe_dev_init()
2282 reg = XP_IOREAD(pdata, XP_PROP_1); in eth_axgbe_dev_init()
2283 pdata->tx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_DMA); in eth_axgbe_dev_init()
2284 pdata->rx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_DMA); in eth_axgbe_dev_init()
2285 pdata->tx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_QUEUES); in eth_axgbe_dev_init()
2286 pdata->rx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_QUEUES); in eth_axgbe_dev_init()
2289 axgbe_set_counts(pdata); in eth_axgbe_dev_init()
2292 reg = XP_IOREAD(pdata, XP_PROP_2); in eth_axgbe_dev_init()
2293 pdata->tx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, TX_FIFO_SIZE); in eth_axgbe_dev_init()
2294 pdata->tx_max_fifo_size *= 16384; in eth_axgbe_dev_init()
2295 pdata->tx_max_fifo_size = RTE_MIN(pdata->tx_max_fifo_size, in eth_axgbe_dev_init()
2296 pdata->vdata->tx_max_fifo_size); in eth_axgbe_dev_init()
2297 pdata->rx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, RX_FIFO_SIZE); in eth_axgbe_dev_init()
2298 pdata->rx_max_fifo_size *= 16384; in eth_axgbe_dev_init()
2299 pdata->rx_max_fifo_size = RTE_MIN(pdata->rx_max_fifo_size, in eth_axgbe_dev_init()
2300 pdata->vdata->rx_max_fifo_size); in eth_axgbe_dev_init()
2302 ret = pdata->hw_if.exit(pdata); in eth_axgbe_dev_init()
2307 axgbe_default_config(pdata); in eth_axgbe_dev_init()
2310 if (!pdata->tx_max_fifo_size) in eth_axgbe_dev_init()
2311 pdata->tx_max_fifo_size = pdata->hw_feat.tx_fifo_size; in eth_axgbe_dev_init()
2312 if (!pdata->rx_max_fifo_size) in eth_axgbe_dev_init()
2313 pdata->rx_max_fifo_size = pdata->hw_feat.rx_fifo_size; in eth_axgbe_dev_init()
2315 pdata->tx_desc_count = AXGBE_MAX_RING_DESC; in eth_axgbe_dev_init()
2316 pdata->rx_desc_count = AXGBE_MAX_RING_DESC; in eth_axgbe_dev_init()
2317 pthread_mutex_init(&pdata->xpcs_mutex, NULL); in eth_axgbe_dev_init()
2318 pthread_mutex_init(&pdata->i2c_mutex, NULL); in eth_axgbe_dev_init()
2319 pthread_mutex_init(&pdata->an_mutex, NULL); in eth_axgbe_dev_init()
2320 pthread_mutex_init(&pdata->phy_mutex, NULL); in eth_axgbe_dev_init()
2322 ret = pdata->phy_if.phy_init(pdata); in eth_axgbe_dev_init()