1418 	void *tir_ctx, *outer, *inner, *rss_key;  in mlx5_devx_cmd_create_tir()  local
1428 	tir_ctx = MLX5_ADDR_OF(create_tir_in, in, ctx);  in mlx5_devx_cmd_create_tir()
1429 	MLX5_SET(tirc, tir_ctx, disp_type, tir_attr->disp_type);  in mlx5_devx_cmd_create_tir()
1430 	MLX5_SET(tirc, tir_ctx, lro_timeout_period_usecs,  in mlx5_devx_cmd_create_tir()
1432 	MLX5_SET(tirc, tir_ctx, lro_enable_mask, tir_attr->lro_enable_mask);  in mlx5_devx_cmd_create_tir()
1433 	MLX5_SET(tirc, tir_ctx, lro_max_msg_sz, tir_attr->lro_max_msg_sz);  in mlx5_devx_cmd_create_tir()
1434 	MLX5_SET(tirc, tir_ctx, inline_rqn, tir_attr->inline_rqn);  in mlx5_devx_cmd_create_tir()
1435 	MLX5_SET(tirc, tir_ctx, rx_hash_symmetric, tir_attr->rx_hash_symmetric);  in mlx5_devx_cmd_create_tir()
1436 	MLX5_SET(tirc, tir_ctx, tunneled_offload_en,  in mlx5_devx_cmd_create_tir()
1438 	MLX5_SET(tirc, tir_ctx, indirect_table, tir_attr->indirect_table);  in mlx5_devx_cmd_create_tir()
1439 	MLX5_SET(tirc, tir_ctx, rx_hash_fn, tir_attr->rx_hash_fn);  in mlx5_devx_cmd_create_tir()
1440 	MLX5_SET(tirc, tir_ctx, self_lb_block, tir_attr->self_lb_block);  in mlx5_devx_cmd_create_tir()
1441 	MLX5_SET(tirc, tir_ctx, transport_domain, tir_attr->transport_domain);  in mlx5_devx_cmd_create_tir()
1442 	rss_key = MLX5_ADDR_OF(tirc, tir_ctx, rx_hash_toeplitz_key);  in mlx5_devx_cmd_create_tir()
1444 	outer = MLX5_ADDR_OF(tirc, tir_ctx, rx_hash_field_selector_outer);  in mlx5_devx_cmd_create_tir()
1451 	inner = MLX5_ADDR_OF(tirc, tir_ctx, rx_hash_field_selector_inner);  in mlx5_devx_cmd_create_tir()
1488 	void *tir_ctx;  in mlx5_devx_cmd_modify_tir()  local
1495 	tir_ctx = MLX5_ADDR_OF(modify_rq_in, in, ctx);  in mlx5_devx_cmd_modify_tir()
1498 		MLX5_SET(tirc, tir_ctx, lro_timeout_period_usecs,  in mlx5_devx_cmd_modify_tir()
1500 		MLX5_SET(tirc, tir_ctx, lro_enable_mask,  in mlx5_devx_cmd_modify_tir()
1502 		MLX5_SET(tirc, tir_ctx, lro_max_msg_sz,  in mlx5_devx_cmd_modify_tir()
1507 		MLX5_SET(tirc, tir_ctx, indirect_table,  in mlx5_devx_cmd_modify_tir()
1514 		MLX5_SET(tirc, tir_ctx, rx_hash_symmetric,  in mlx5_devx_cmd_modify_tir()
1516 		MLX5_SET(tirc, tir_ctx, rx_hash_fn, tir_attr->rx_hash_fn);  in mlx5_devx_cmd_modify_tir()
1518 			MLX5_SET(tirc, tir_ctx, rx_hash_toeplitz_key[i],  in mlx5_devx_cmd_modify_tir()
1521 		outer = MLX5_ADDR_OF(tirc, tir_ctx,  in mlx5_devx_cmd_modify_tir()
1530 		inner = MLX5_ADDR_OF(tirc, tir_ctx,  in mlx5_devx_cmd_modify_tir()
1542 		MLX5_SET(tirc, tir_ctx, self_lb_block, tir_attr->self_lb_block);  in mlx5_devx_cmd_modify_tir()