Lines Matching refs:RTE_ETH_FOREACH_DEV
725 RTE_ETH_FOREACH_DEV(pt_id) { in set_default_fwd_ports_config()
973 RTE_ETH_FOREACH_DEV(pid) { in dma_unmap_cb()
1015 RTE_ETH_FOREACH_DEV(pid) { in dma_map_cb()
1247 RTE_ETH_FOREACH_DEV(pi) { in get_allowed_max_nb_rxq()
1295 RTE_ETH_FOREACH_DEV(pi) { in get_allowed_max_nb_txq()
1342 RTE_ETH_FOREACH_DEV(pi) { in get_allowed_max_nb_rxd()
1366 RTE_ETH_FOREACH_DEV(pi) { in get_allowed_min_nb_rxd()
1424 RTE_ETH_FOREACH_DEV(pi) { in get_allowed_max_nb_txd()
1448 RTE_ETH_FOREACH_DEV(pi) { in get_allowed_min_nb_txd()
1505 RTE_ETH_FOREACH_DEV(pi) { in get_allowed_max_nb_hairpinq()
1651 RTE_ETH_FOREACH_DEV(pid) { in init_config()
1776 RTE_ETH_FOREACH_DEV(pid) { in init_fwd_streams()
2426 RTE_ETH_FOREACH_DEV(pi) { in all_ports_started()
2454 RTE_ETH_FOREACH_DEV(pi) { in all_ports_stopped()
2506 RTE_ETH_FOREACH_DEV(next_pi) in setup_hairpin_queues()
2715 RTE_ETH_FOREACH_DEV(pi) in fill_xstats_display_info()
2737 RTE_ETH_FOREACH_DEV(pi) { in start_port()
3034 RTE_ETH_FOREACH_DEV(pi) { in stop_port()
3127 RTE_ETH_FOREACH_DEV(pi) { in close_port()
3183 RTE_ETH_FOREACH_DEV(pi) { in reset_port()
3405 RTE_ETH_FOREACH_DEV(pt_id) { in pmd_test_exit()
3410 RTE_ETH_FOREACH_DEV(pt_id) { in pmd_test_exit()
3471 RTE_ETH_FOREACH_DEV(portid) { in check_all_ports_link_status()
3774 RTE_ETH_FOREACH_DEV(pid) { in init_port_config()
4150 RTE_ETH_FOREACH_DEV(port_id) { in main()
4242 RTE_ETH_FOREACH_DEV(port_id) { in main()