| #
63dc7f56 |
| 26-Aug-2005 |
Chris Lattner <[email protected]> |
spell this variable right
llvm-svn: 23095
|
| #
3d9fbefb |
| 26-Aug-2005 |
Chris Lattner <[email protected]> |
Expose a new flag to TargetInstrInfo
llvm-svn: 23094
|
| #
73ec2cb0 |
| 19-Aug-2005 |
Chris Lattner <[email protected]> |
Split register class "Methods" into MethodProtos and MethodBodies
llvm-svn: 22928
|
| #
418d8cfc |
| 19-Aug-2005 |
Chris Lattner <[email protected]> |
Read the namespace field from register classes
llvm-svn: 22918
|
| #
08996141 |
| 19-Aug-2005 |
Chris Lattner <[email protected]> |
Fix a problem jeffc noticed
llvm-svn: 22903
|
| #
17727bad |
| 18-Aug-2005 |
Chris Lattner <[email protected]> |
Figure out how many operands each instruction has, keep track of whether
or not it's variable.
llvm-svn: 22885
|
|
Revision tags: llvmorg-1.5.0 |
|
| #
650ba8eb |
| 22-Apr-2005 |
Misha Brukman <[email protected]> |
Remove trailing whitespace
llvm-svn: 21428
|
| #
945e8655 |
| 22-Jan-2005 |
Chris Lattner <[email protected]> |
Refactor code for numbering instructions into CodeGenTarget.
llvm-svn: 19758
|
| #
733c82bf |
| 02-Jan-2005 |
Chris Lattner <[email protected]> |
Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.
llvm-svn: 19243
|
|
Revision tags: llvmorg-1.4.0 |
|
| #
243ded5e |
| 14-Oct-2004 |
Misha Brukman <[email protected]> |
* Add option to read isLittleEndianEncoding for InstrInfo classes
* Doxygen-ify some function comments
llvm-svn: 16974
|
| #
91c538f2 |
| 03-Oct-2004 |
Chris Lattner <[email protected]> |
Add initial support for variants. This just parses the new format, no
functionality is added
llvm-svn: 16636
|
| #
996ddbc9 |
| 28-Sep-2004 |
Nate Begeman <[email protected]> |
Add support for the isLoad and isStore flags, needed by the instruction scheduler
llvm-svn: 16554
|
| #
9b0dfa3c |
| 28-Sep-2004 |
Chris Lattner <[email protected]> |
Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG
llvm-svn: 16553
|
| #
8eab62ee |
| 21-Aug-2004 |
Chris Lattner <[email protected]> |
Alignment is now in bits.
llvm-svn: 15976
|
| #
beadefde |
| 21-Aug-2004 |
Chris Lattner <[email protected]> |
Make alignment be in bits, just like size is
llvm-svn: 15969
|
| #
d3244d9c |
| 21-Aug-2004 |
Chris Lattner <[email protected]> |
Support "Methods" in register classes in CodgeGenRegisterClass
llvm-svn: 15965
|
| #
2a86fab9 |
| 21-Aug-2004 |
Chris Lattner <[email protected]> |
Start parsing register classes into a more structured form
llvm-svn: 15961
|
| #
e34ae999 |
| 21-Aug-2004 |
Chris Lattner <[email protected]> |
Read in declared reg sizes
llvm-svn: 15960
|
| #
8af61ddb |
| 16-Aug-2004 |
Chris Lattner <[email protected]> |
Use CodeGenRegister class to make reading in of register information more
systematic.
llvm-svn: 15805
|
| #
6ffa501d |
| 14-Aug-2004 |
Chris Lattner <[email protected]> |
Make the AsmWriter a first-class tblgen object. Allow targets to specify
name of the generated asmwriter class, and the name of the format string.
llvm-svn: 15747
|
|
Revision tags: llvmorg-1.3.0 |
|
| #
3bc477a2 |
| 11-Aug-2004 |
Chris Lattner <[email protected]> |
Start parsing more information from the Operand information
llvm-svn: 15644
|
| #
101f3fea |
| 11-Aug-2004 |
Chris Lattner <[email protected]> |
Remove special case hacks
llvm-svn: 15643
|
| #
5572682f |
| 01-Aug-2004 |
Chris Lattner <[email protected]> |
Parse the operand list of the instruction. We currently support register and immediate operands.
llvm-svn: 15390
|
| #
1c4ae850 |
| 01-Aug-2004 |
Chris Lattner <[email protected]> |
Initial cut at an asm writer emitter. So far, this only handles emission of
instructions, and only instructions that take no operands at that!
llvm-svn: 15386
|
| #
c860ecaf |
| 01-Aug-2004 |
Chris Lattner <[email protected]> |
Add, and start using, the CodeGenInstruction class. This class represents
an instance of the Instruction tablegen class.
llvm-svn: 15385
|