[WebAssembly] Implement unaligned loads and stores.

Differential Revision: http://reviews.llvm.org/D16534

llvm-svn: 258779

[WebAssembly] Disable some WebAssembly-specific optimization passes at -O0.

llvm-svn: 258127

[WebAssembly] Add -m:e to the target triple.

This enables ELF-style name mangling, which primarily means using ".L" for
private symbols.

llvm-svn: 257020

[WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify.

Move RegStackify after coalescing and teach it to use LiveIntervals instead
of depending on SSA form. This avoids a problem

[WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify.

Move RegStackify after coalescing and teach it to use LiveIntervals instead
of depending on SSA form. This avoids a problem where a register in a COPY
instruction is stackified and then subsequently coalesced with a register
that is not stackified.

This also puts it after the scheduler, which allows us to simplify the
EXPR_STACK constraint, as we no longer have instructions being reordered
after stackification and before coloring.

llvm-svn: 256402

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[WebAssembly] Convert WebAssemblyTargetObjectFile to TargetLoweringObjectFileELF

llvm-svn: 255877

[WebAssembly] Experimental ELF writer support

This creates the initial infrastructure for writing ELF output files. It
doesn't yet have any implementation for encoding instructions.

Differential Re

[WebAssembly] Experimental ELF writer support

This creates the initial infrastructure for writing ELF output files. It
doesn't yet have any implementation for encoding instructions.

Differential Revision: http://reviews.llvm.org/D15555

llvm-svn: 255869

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[WebAssembly] Implement eliminateCallFramePseudo

Summary:
Implement eliminateCallFramePsuedo to handle ADJCALLSTACKUP/DOWN
pseudo-instructions. Add a test calling a vararg function which causes non-

[WebAssembly] Implement eliminateCallFramePseudo

Summary:
Implement eliminateCallFramePsuedo to handle ADJCALLSTACKUP/DOWN
pseudo-instructions. Add a test calling a vararg function which causes non-0
adjustments. This revealed an issue with RegisterCoalescer wherein it
eliminates a COPY from SP32 to a vreg but failes to update the live ranges
of EXPR_STACK, causing a machineinstr verifier failure (so this test
is commented out).

Also add a dynamic alloca test, which causes a callseq_end dag node with
a 0 (instead of undef) second argument to be generated. We currently fail to
select that, so adjust the ADJCALLSTACKUP tablegen code to handle it.

Differential Revision: http://reviews.llvm.org/D15587

llvm-svn: 255844

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[WebAssembly] Implement prolog/epilog insertion and FrameIndex elimination

Summary:
Use the SP32 physical register as the base for FrameIndex
lowering. Update it and the __stack_pointer global var

[WebAssembly] Implement prolog/epilog insertion and FrameIndex elimination

Summary:
Use the SP32 physical register as the base for FrameIndex
lowering. Update it and the __stack_pointer global var in the prolog and
epilog. Extend the mapping of virtual registers to wasm locals to
include the physical registers.

Rather than modify the target-independent PrologEpilogInserter (which
asserts that there are no virtual registers left) include a
slightly-modified copy for Wasm that does not have this assertion and
only clears the virtual registers if scavenging was needed (which of
course it isn't for wasm).

Differential Revision: http://reviews.llvm.org/D15344

llvm-svn: 255392

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[WebAssembly] Reintroduce ARGUMENT moving logic

Reinteroduce the code for moving ARGUMENTS back to the top of the basic block.
While the ARGUMENTS physical register prevents sinking and scheduling f

[WebAssembly] Reintroduce ARGUMENT moving logic

Reinteroduce the code for moving ARGUMENTS back to the top of the basic block.
While the ARGUMENTS physical register prevents sinking and scheduling from
moving them, it does not appear to be sufficient to prevent SelectionDAG from
moving them down in the initial schedule. This patch introduces a patch that
moves them back to the top immediately after SelectionDAG runs.

This is still hopefully a temporary solution. http://reviews.llvm.org/D14750 is
one alternative, though the review has not been favorable, and proposed
alternatives are longer-term and have other downsides.

This fixes the main outstanding -verify-machineinstrs failures, so it adds
-verify-machineinstrs to several tests.

Differential Revision: http://reviews.llvm.org/D15377

llvm-svn: 255125

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[WebAssembly] Call TargetPassConfig base class functions in overriding functions.

llvm-svn: 254855

[WebAssembly] Implement ReverseBranchCondition, and re-enable MachineBlockPlacement

This patch introduces a codegen-only instruction currently named br_unless,
which makes it convenient to implement

[WebAssembly] Implement ReverseBranchCondition, and re-enable MachineBlockPlacement

This patch introduces a codegen-only instruction currently named br_unless,
which makes it convenient to implement ReverseBranchCondition and re-enable
the MachineBlockPlacement pass. Then in a late pass, it lowers br_unless
back into br_if.

Differential Revision: http://reviews.llvm.org/D14995

llvm-svn: 254826

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[WebAssembly] Delete unused functions. NFC.

llvm-svn: 254268

[WebAssembly] Minor clang-format and selected clang-tidy cleanups. NFC.

llvm-svn: 254267

[WebAssembly] Add some comments. NFC.

llvm-svn: 254096

[WebAssembly] Clean up several FIXME comments.

llvm-svn: 254079

[WebAssembly] Support for register stackifying with load and store instructions.

llvm-svn: 254076

[WebAssembly] Emit .param, .result, and .local through MC.

This eliminates one of the main remaining uses of EmitRawText.

llvm-svn: 253878

[WebAssembly] Enable register coloring and register stackifying.

This also takes the push/pop syntax another step forward, introducing stack
slot numbers to make it easier to see how expressions are

[WebAssembly] Enable register coloring and register stackifying.

This also takes the push/pop syntax another step forward, introducing stack
slot numbers to make it easier to see how expressions are connected. For
example, the value pushed in $push7 is popped in $pop7.

And, this begins an experiment with making get_local and set_local implicit
when an operation directly uses or defines a register. This greatly reduces
clutter. If this experiment succeeds, it may make sense to do this for
const instructions as well.

And, this introduces more special code for ARGUMENTS; hopefully this code
will soon be obviated by proper support for live-in virtual registers.

llvm-svn: 253465

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[WebAssembly] Reapply r252858, with svn add for the new file.

Switch to MC for instruction printing.

This encompasses several changes which are all interconnected:
- Use the MC framework for print

[WebAssembly] Reapply r252858, with svn add for the new file.

Switch to MC for instruction printing.

This encompasses several changes which are all interconnected:
- Use the MC framework for printing almost all instructions.
- AsmStrings are now live.
- This introduces an indirection between LLVM vregs and WebAssembly registers,
and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping.
This addresses some basic issues with argument registers and unused registers.
- The way ARGUMENT instructions are handled no longer generates redundant
get_local+set_local for every argument.

This also changes the assembly syntax somewhat; most notably, MC's printing
does not use sigils on label names, so those are no longer present, and
push/pop now have a sigil to keep them unambiguous.

The usage of set_local/get_local/$push/$pop will continue to evolve
significantly. This patch is just one step of a larger change.

llvm-svn: 252910

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Revert r252858: "[WebAssembly] Switch to MC for instruction printing."

It broke the CMake build:

"Cannot find source file: WebAssemblyRegNumbering.cpp"

llvm-svn: 252897

[WebAssembly] Switch to MC for instruction printing.

This encompasses several changes which are all interconnected:
- Use the MC framework for printing almost all instructions.
- AsmStrings are no

[WebAssembly] Switch to MC for instruction printing.

This encompasses several changes which are all interconnected:
- Use the MC framework for printing almost all instructions.
- AsmStrings are now live.
- This introduces an indirection between LLVM vregs and WebAssembly registers,
and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping.
This addresses some basic issues with argument registers and unused registers.
- The way ARGUMENT instructions are handled no longer generates redundant
get_local+set_local for every argument.

This also changes the assembly syntax somewhat; most notably, MC's printing
use sigils on label names, so those are no longer present, and push/pop now
have a sigil to keep them unambiguous.

The usage of set_local/get_local/$push/$pop will continue to evolve
significantly. This patch is just one step of a larger change.

llvm-svn: 252858

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[WebAssembly] Support 'unreachable' expression

Lower LLVM's 'unreachable' terminator to ISD::TRAP, and lower ISD::TRAP to
wasm's 'unreachable' expression.

WebAssembly type-checks expressions, but a

[WebAssembly] Support 'unreachable' expression

Lower LLVM's 'unreachable' terminator to ISD::TRAP, and lower ISD::TRAP to
wasm's 'unreachable' expression.

WebAssembly type-checks expressions, but a noreturn function with a
return type that doesn't match the context will cause a check
failure. So we lower LLVM 'unreachable' to ISD::TRAP and then lower that
to WebAssembly's 'unreachable' expression, which typechecks in any
context and causes a trap if executed.

Differential Revision: http://reviews.llvm.org/D14515

llvm-svn: 252566

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Try to fix WebAssembly build after r247864

llvm-svn: 247870

[WebAssembly] Check in an initial CFG Stackifier pass

This pass implements a simple algorithm for conversion from CFG to
wasm's structured control flow. It doesn't yet handle multiple-entry
loops; t

[WebAssembly] Check in an initial CFG Stackifier pass

This pass implements a simple algorithm for conversion from CFG to
wasm's structured control flow. It doesn't yet handle multiple-entry
loops; that will be added in a future patch.

It also adds initial support for switch statements.

Differential Revision: http://reviews.llvm.org/D12735

llvm-svn: 247818

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[WebAssembly] Support running without a register allocator in the default CodeGen passes

This allows backends which don't use a traditional register allocator,
but do need PHI lowering and other pas

[WebAssembly] Support running without a register allocator in the default CodeGen passes

This allows backends which don't use a traditional register allocator,
but do need PHI lowering and other passes, to use the default
TargetPassConfig::addFastRegAlloc and
TargetPassConfig::addOptimizedRegAlloc implementations.

Differential Revision: http://reviews.llvm.org/D12691

llvm-svn: 247065

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