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Revision tags: llvmorg-3.5.2, llvmorg-3.5.2-rc1 |
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9f380a3c |
| 16-Mar-2015 |
David Blaikie <[email protected]> |
Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter
This covers essentially all of llvm's headers and libs. One or two weird cases I wasn't sure were worth/a
Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter
This covers essentially all of llvm's headers and libs. One or two weird cases I wasn't sure were worth/appropriate to fix.
llvm-svn: 232394
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Revision tags: llvmorg-3.6.0, llvmorg-3.6.0-rc4, llvmorg-3.6.0-rc3, llvmorg-3.6.0-rc2, llvmorg-3.6.0-rc1 |
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df87f938 |
| 13-Jan-2015 |
Hal Finkel <[email protected]> |
[StackMaps] Allow the target to pre-process the live-out mask
Some targets, PowerPC for example, have pseudo-registers (such as that used to represent the rounding mode), that don't have DWARF regis
[StackMaps] Allow the target to pre-process the live-out mask
Some targets, PowerPC for example, have pseudo-registers (such as that used to represent the rounding mode), that don't have DWARF register numbers or a register class. These are used only for internal dependency tracking, and should not appear in the recorded live-outs. This adds a callback allowing the target to pre-process the live-out mask in order to remove these kinds of registers so that the StackMaps code does not complain about them and/or attempt to include them in the output.
This will be used by the PowerPC target in a future commit.
llvm-svn: 225805
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Revision tags: llvmorg-3.5.1, llvmorg-3.5.1-rc2, llvmorg-3.5.1-rc1, llvmorg-3.5.0, llvmorg-3.5.0-rc4, llvmorg-3.5.0-rc3, llvmorg-3.5.0-rc2 |
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fc6de428 |
| 05-Aug-2014 |
Eric Christopher <[email protected]> |
Have MachineFunction cache a pointer to the subtarget to make lookups shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lo
Have MachineFunction cache a pointer to the subtarget to make lookups shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lookups from the MachineFunction easily.
Update the MIPS subtarget switching machinery to update this pointer at the same time it runs.
llvm-svn: 214838
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d913448b |
| 04-Aug-2014 |
Eric Christopher <[email protected]> |
Remove the TargetMachine forwards for TargetSubtargetInfo based information and update all callers. No functional change.
llvm-svn: 214781
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Revision tags: llvmorg-3.5.0-rc1 |
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009bff22 |
| 26-Jun-2014 |
Juergen Ributzka <[email protected]> |
[StackMaps] Enable patchpoint liveness analysis per default.
llvm-svn: 211817
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14871f73 |
| 26-Jun-2014 |
Juergen Ributzka <[email protected]> |
[Stackmaps] Remove the liveness calculation for stackmap intrinsics.
There is no need to calculate the liveness information for stackmaps. The liveness information is still available for the patchpo
[Stackmaps] Remove the liveness calculation for stackmap intrinsics.
There is no need to calculate the liveness information for stackmaps. The liveness information is still available for the patchpoint intrinsic and that is also the intended usage model.
Related to <rdar://problem/17473725>
llvm-svn: 211816
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Revision tags: llvmorg-3.4.2, llvmorg-3.4.2-rc1, llvmorg-3.4.1, llvmorg-3.4.1-rc2 |
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1b9dde08 |
| 22-Apr-2014 |
Chandler Carruth <[email protected]> |
[Modules] Remove potential ODR violations by sinking the DEBUG_TYPE define below all header includes in the lib/CodeGen/... tree. While the current modules implementation doesn't check for this kind
[Modules] Remove potential ODR violations by sinking the DEBUG_TYPE define below all header includes in the lib/CodeGen/... tree. While the current modules implementation doesn't check for this kind of ODR violation yet, it is likely to grow support for it in the future. It also removes one layer of macro pollution across all the included headers.
Other sub-trees will follow.
llvm-svn: 206837
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Revision tags: llvmorg-3.4.1-rc1 |
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326c1f68 |
| 04-Apr-2014 |
Andrew Trick <[email protected]> |
Minor change to StackMapLiveness DEBUG output.
llvm-svn: 205656
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Revision tags: llvmorg-3.4.0, llvmorg-3.4.0-rc3 |
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e8294753 |
| 14-Dec-2013 |
Juergen Ributzka <[email protected]> |
[Stackmap] Liveness Analysis Pass
This optional register liveness analysis pass can be enabled with either -enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass traverses each ba
[Stackmap] Liveness Analysis Pass
This optional register liveness analysis pass can be enabled with either -enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass traverses each basic block in a machine function. For each basic block the instructions are processed in reversed order and if a patchpoint or stackmap instruction is encountered the current live-out register set is encoded as a register mask and attached to the instruction.
Later on during stackmap generation the live-out register mask is processed and also emitted as part of the stackmap.
This information is optional and intended for optimization purposes only. This will enable a client of the stackmap to reason about the registers it can use and which registers need to be preserved.
Reviewed by Andy
llvm-svn: 197317
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8d6a6584 |
| 13-Dec-2013 |
Andrew Trick <[email protected]> |
Liveness Analysis Pass
llvm-svn: 197254
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