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3e0199f7 |
| 12-Oct-2017 |
Don Hinton <[email protected]> |
[dump] Remove NDEBUG from test to enable dump methods [NFC]
Summary: Add LLVM_FORCE_ENABLE_DUMP cmake option, and use it along with LLVM_ENABLE_ASSERTIONS to set LLVM_ENABLE_DUMP.
Remove NDEBUG and
[dump] Remove NDEBUG from test to enable dump methods [NFC]
Summary: Add LLVM_FORCE_ENABLE_DUMP cmake option, and use it along with LLVM_ENABLE_ASSERTIONS to set LLVM_ENABLE_DUMP.
Remove NDEBUG and only use LLVM_ENABLE_DUMP to enable dump methods.
Move definition of LLVM_ENABLE_DUMP from config.h to llvm-config.h so it'll be picked up by public headers.
Differential Revision: https://reviews.llvm.org/D38406
llvm-svn: 315590
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Revision tags: llvmorg-5.0.0, llvmorg-5.0.0-rc5, llvmorg-5.0.0-rc4, llvmorg-5.0.0-rc3, llvmorg-5.0.0-rc2, llvmorg-5.0.0-rc1 |
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db78273b |
| 20-Jul-2017 |
Matt Arsenault <[email protected]> |
Add an ID field to StackObjects
On AMDGPU SGPR spills are really spilled to another register. The spiller creates the spills to new frame index objects, which is used as a placeholder.
This will ev
Add an ID field to StackObjects
On AMDGPU SGPR spills are really spilled to another register. The spiller creates the spills to new frame index objects, which is used as a placeholder.
This will eventually be replaced with a reference to a position in a VGPR to write to and the frame index deleted. It is most likely not a real stack location that can be shared with another stack object.
This is a problem when StackSlotColoring decides it should combine a frame index used for a normal VGPR spill with a real stack location and a frame index used for an SGPR.
Add an ID field so that StackSlotColoring has a way of knowing the different frame index types are incompatible.
llvm-svn: 308673
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Revision tags: llvmorg-4.0.1, llvmorg-4.0.1-rc3, llvmorg-4.0.1-rc2 |
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4682ac6c |
| 05-May-2017 |
Matthias Braun <[email protected]> |
ARM: Compute MaxCallFrame size early
This exposes a method in MachineFrameInfo that calculates MaxCallFrameSize and calls it after instruction selection in the ARM target.
This avoids ARMBaseRegist
ARM: Compute MaxCallFrame size early
This exposes a method in MachineFrameInfo that calculates MaxCallFrameSize and calls it after instruction selection in the ARM target.
This avoids ARMBaseRegisterInfo::canRealignStack()/ARMFrameLowering::hasReservedCallFrame() giving different answers in early/late phases of codegen.
The testcase shows a particular nasty example result of that where we would fail to properly align an alloca.
Differential Revision: https://reviews.llvm.org/D32622
llvm-svn: 302303
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Revision tags: llvmorg-4.0.1-rc1 |
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e4e14ae5 |
| 26-Apr-2017 |
Matthias Braun <[email protected]> |
MachineFrameInfo: Move implementation to an own file; NFC
Move implementation of the MachineFrameInfo class into MachineFrameInfo.cpp
llvm-svn: 301494
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