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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7 |
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82b9a6bb |
| 14-Apr-2022 |
Tony Lindgren <[email protected]> |
dt-bindings: timer: Update TI timer to yaml
Let's update the TI timer binding to use yaml. As this binding is specific
to the TI dual-mode timers also known as dm-timers, let's use file name
ti,time
dt-bindings: timer: Update TI timer to yaml
Let's update the TI timer binding to use yaml. As this binding is specific
to the TI dual-mode timers also known as dm-timers, let's use file name
ti,timer-dm.yaml to avoid confusion with other timers.
We add checks for the deprecated ti,hwmods property as done for other TI
device driver bindings earlier.
We also correct the issue with the old binding that was out of date for
several properties.
The am43 related timers are undocumented, but compatible with the am3
timers. Let's add the am43 timers too.
The dm814 and dm816 timers are missing, let's add them.
Some timers on some SoCs are dual mapped, like the ABE timers on omap4
and 5. The reg property maxItems must be updated to 2.
The timer clocks can be managed by the parent interconnect target module
with no clocks assigned for the timer node. And in some cases, the SoC may
need to configure additional system clock for the timer in addition to the
functional clock.
The clock names are optional and not specific to the comptible property.
For example, dra7 timers on l3 interconnect do not need clock-names, while
the timers on dra7 l4 interconnect need them with both being compatible
with ti,omap5430-timer.
Cc: Daniel Lezcano <[email protected]>
Cc: Grygorii Strashko <[email protected]>
Cc: Keerthy <[email protected]>
Cc: Nishanth Menon <[email protected]>
Cc: Vignesh Raghavendra <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Grygorii Strashko <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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